The following pages link to Randal E. Bryant (Q1426129):
Displaying 47 items.
- Effective use of Boolean satisfiability procedures in the formal verification of superscalar and VLIW microprocessors. (Q1426130) (← links)
- Verification of arithmetic circuits using binary moment diagrams (Q1606802) (← links)
- Generating extended resolution proofs with a BDD-based SAT solver (Q2044191) (← links)
- Dual proof generation for quantified Boolean formulas with a BDD-based solver (Q2055876) (← links)
- Preprocessing of propagation redundant clauses (Q2104502) (← links)
- State-set branching: leveraging BDDs for heuristic search (Q2389616) (← links)
- (Q2754075) (← links)
- Binary Decision Diagrams (Q3176365) (← links)
- A Switch-Level Model and Simulator for MOS Digital Systems (Q3312162) (← links)
- On the complexity of VLSI implementations and graph representations of Boolean functions with application to integer multiplication (Q3417010) (← links)
- A View from the Engine Room: Computational Support for Symbolic Model Checking (Q3512438) (← links)
- Formal Verification of Infinite State Systems Using Boolean Methods (Q3527279) (← links)
- Graph-Based Algorithms for Boolean Function Manipulation (Q3724245) (← links)
- (Q4037095) (← links)
- (Q4037372) (← links)
- A methodology for hardware verification based on logic simulation (Q4302838) (← links)
- Geometric characterization of series-parallel variable resistor networks (Q4338097) (← links)
- (Q4427901) (← links)
- (Q4553255) (← links)
- (Q4721964) (← links)
- (Q4804887) (← links)
- (Q4804898) (← links)
- (Q4818801) (← links)
- (Q4818814) (← links)
- FST TCS 2003: Foundations of Software Technology and Theoretical Computer Science (Q5191535) (← links)
- Predicate abstraction with indexed predicates (Q5277793) (← links)
- Tools and Algorithms for the Construction and Analysis of Systems (Q5308385) (← links)
- (Q5309034) (← links)
- Deciding Quantifier-Free Presburger Formulas Using Parameterized Solution Bounds (Q5310643) (← links)
- Computer Aided Verification (Q5312894) (← links)
- Computer Aided Verification (Q5312905) (← links)
- On the complexity of VLSI implementations and graph representations of Boolean functions with application to integer multiplication (Q5375393) (← links)
- Automated Deduction – CADE-20 (Q5394618) (← links)
- Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic (Q5738912) (← links)
- Boolean satisfiability with transitivity constraints (Q5738967) (← links)
- Deciding Bit-Vector Arithmetic with Abstraction (Q5758122) (← links)
- Correct Hardware Design and Verification Methods (Q5897078) (← links)
- Computer Aided Verification (Q5900675) (← links)
- Computer Aided Verification (Q5900676) (← links)
- Computer Aided Verification (Q5900689) (← links)
- Verification, Model Checking, and Abstract Interpretation (Q5901914) (← links)
- Chain reduction for binary and zero-suppressed decision diagrams (Q5919001) (← links)
- Chain reduction for binary and zero-suppressed decision diagrams (Q5919614) (← links)
- Preprocessing of propagation redundant clauses (Q6053844) (← links)
- Clausal proofs for pseudo-Boolean reasoning (Q6535573) (← links)
- Moving definition variables in quantified Boolean formulas (Q6535574) (← links)
- Certified knowledge compilation with application to verified model counting (Q6643078) (← links)
