The following pages link to Shay Gueron (Q186330):
Displaying 24 items.
- Speeding up CRC32C computations with intel CRC32 instruction (Q413278) (← links)
- A model of herd grazing as a travelling wave, chemotaxis and stability (Q753728) (← links)
- Efficient implementation of the Galois counter mode using a carry-less multiplier and a fast reduction algorithm (Q765476) (← links)
- A probabilistic variant of Sperner's theorem and of maximal \(r\)-cover free families (Q785827) (← links)
- The steady-state distributions of coagulation-fragmentation processes (Q1127641) (← links)
- The equilibrium behavior of reversible coagulation-fragmentation processes (Q1295856) (← links)
- Methods for fast computation of integral transforms (Q1316016) (← links)
- CAKE: CODE-based algorithm for key encapsulation (Q1744856) (← links)
- How many queries are needed to distinguish a truncated random permutation from a random function? (Q1747661) (← links)
- The dynamics of group formation (Q1901151) (← links)
- Fast polynomial inversion for post quantum QC-MDPC cryptography (Q2051829) (← links)
- On constant-time QC-MDPC decoders with negligible failure rate (Q2221107) (← links)
- Reduction of a channel-based model for a stomatogastric ganglion LP neuron (Q2367239) (← links)
- Fast garbling of circuits under standard assumptions (Q2413616) (← links)
- Spatial interpolation methods for integrating Newton's equation (Q2564461) (← links)
- The advantage of truncated permutations (Q2656968) (← links)
- A Monte Carlo Algorithm for a Lottery Problem (Q2724981) (← links)
- On Smoluchowski Equations for Coagulation Processes with Multiple Absorbing States (Q2724994) (← links)
- Simpira v2: A Family of Efficient Permutations Using the AES Round Function (Q2958116) (← links)
- Surnaming Schemes, Fast Verification, and Applications to SGX Technology (Q2975802) (← links)
- Software Optimizations for Cryptographic Primitives on General Purpose x86_64 Platforms (Q3104756) (← links)
- A Weighted Erdos-Mordell Inequality (Q3146557) (← links)
- Software Implementation of Modular Exponentiation, Using Advanced Vector Instructions Architectures (Q3166970) (← links)
- Intel’s New AES Instructions for Enhanced Performance and Security (Q3391562) (← links)
