The following pages link to Petrify (Q21763):
Displaying 25 items.
- Distributed simulation of asynchronous Hardware: The program driven synchronization protocol (Q697015) (← links)
- Checking timed Büchi automata emptiness efficiently (Q816203) (← links)
- STG decomposition strategies in combination with unfolding (Q1031867) (← links)
- Verification of asynchronous systems with an unspecified component (Q1731830) (← links)
- Bounded choice-free Petri net synthesis: algorithmic issues (Q1789066) (← links)
- CADRE: An asynchronous embedded DSP for mobile phone applications (Q1859171) (← links)
- Synthesising elementary net systems with localities (Q2077411) (← links)
- Component refinement and CSC-solving for STG decomposition (Q2464945) (← links)
- A predictive synchronizer for periodic clock domains (Q2505635) (← links)
- The Power of Prime Cycles (Q2822651) (← links)
- Petri Net Synthesis for Restricted Classes of Nets (Q2822652) (← links)
- Verification of Asynchronous Circuits using Timed Automata (Q2842571) (← links)
- Compact Representations and Efficient Algorithms for Operating Guidelines (Q2895776) (← links)
- (Q3152832) (← links)
- Balsa: An Asynchronous Hardware Synthesis Language (Q4328963) (← links)
- (Q4417598) (← links)
- (Q4417601) (← links)
- (Q4417611) (← links)
- (Q4824480) (← links)
- (Q4824481) (← links)
- Some Basic Techniques Allowing Petri Net Synthesis: Complexity and Algorithmic Issues (Q5044399) (← links)
- (Q5480167) (← links)
- (Q5506395) (← links)
- Applications and Theory of Petri Nets 2005 (Q5713512) (← links)
- Computer Aided Verification (Q5716585) (← links)
