Pages that link to "Item:Q3535346"

The following pages link to Threshold Implementations Against Side-Channel Attacks and Glitches (Q3535346):

Displaying 37 items.

• Secure hardware implementation of nonlinear functions in the presence of glitches (Q656517) (← links)
• Side-channel resistant crypto for less than 2,300 GE (Q656520) (← links)
• Correlation power analysis and higher-order masking implementation of WAGE (Q832394) (← links)
• Threshold implementations of small S-boxes (Q892276) (← links)
• The wonderful world of global random oracles (Q1648798) (← links)
• Physical attacks and beyond (Q1698608) (← links)
• Hold your breath, PRIMATEs are lightweight (Q1698631) (← links)
• White-box cryptography: don't forget about grey-box attacks (Q2010584) (← links)
• On the EA-classes of known APN functions in small dimensions (Q2040297) (← links)
• Fault template attacks on block ciphers exploiting fault propagation (Q2055630) (← links)
• Leakage resilient value comparison with application to message authentication (Q2056738) (← links)
• SAND: an AND-RX Feistel lightweight block cipher supporting S-box-based security evaluations (Q2068387) (← links)
• Lightweight authenticated encryption mode suitable for threshold implementation (Q2119030) (← links)
• Resilient uniformity: applying resiliency in masking (Q2130025) (← links)
• First full-fledged side channel attack on HMAC-SHA-2 (Q2145284) (← links)
• Spin me right round rotational symmetry for FPGA-specific AES: extended version (Q2188965) (← links)
• Constructions of S-boxes with uniform sharing (Q2632834) (← links)
• Cryptanalysis of masked ciphers: a not so random idea (Q2692369) (← links)
• Arithmetic Addition over Boolean Masking (Q2794517) (← links)
• Masking Large Keys in Hardware: A Masked Implementation of McEliece (Q2807215) (← links)
• ParTI – Towards Combined Hardware Countermeasures Against Side-Channel and Fault-Injection Attacks (Q2829219) (← links)
• Very Compact Hardware Implementations of the Blockcipher CLEFIA (Q2889877) (← links)
• Complementing Feistel Ciphers (Q2946868) (← links)
• Higher-Order Glitch Resistant Implementation of the PRESENT S-Box (Q2947102) (← links)
• A Tale of Two Shares: Why Two-Share Threshold Implementation Seems Worthwhile—and Why It Is Not (Q2958149) (← links)
• An Efficient Side-Channel Protected AES Implementation with Arbitrary Protection Order (Q2975799) (← links)
• Hiding Higher-Order Side-Channel Leakage (Q2975801) (← links)
• Enabling 3-Share Threshold Implementations for all 4-Bit S-Boxes (Q3193255) (← links)
• Reducing Randomness Complexity of Mask Refreshing Algorithm (Q3297482) (← links)
• Protecting Triple-DES Against DPA (Q3297558) (← links)
• A First-Order SCA Resistant AES Without Fresh Randomness (Q3297561) (← links)
• Consolidating Masking Schemes (Q3457138) (← links)
• Secure Hardware Implementation of Non-linear Functions in the Presence of Glitches (Q3617507) (← links)
• FROM CRYPTANALYSIS TO CRYPTOGRAPHIC PROPERTY OF A BOOLEAN FUNCTION (Q5150744) (← links)
• Chosen-ciphertext secure code-based threshold public key encryptions with short ciphertext (Q6123051) (← links)
• On decompositions of permutation polynomials into quadratic and cubic power permutations (Q6159437) (← links)
• Domain-oriented masked bit-parallel finite-field multiplier against side-channel attacks (Q6161456) (← links)