The following pages link to Paul T. Hulina (Q4419780):
Displayed 5 items.
- Memory latency effects in decoupled architectures (Q4419782) (← links)
- Generation of a Clock Pulse for Asynchronous Sequential Machines to Eliminate Critical Races (Q5635359) (← links)
- Elimination of static and dynamic hazards for multiple input changes in combinational switching circuits (Q5650607) (← links)
- Generation of Prime Implicants by Direct Multiplication (Q5658022) (← links)
- Synthesis of Multiple-Input Change Asynchronous Circuits Using Transition-Sensitive Flip-Flops (Q5665116) (← links)