Pages that link to "Item:Q4802628"
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The following pages link to Logic Synthesis for Asynchronous Controllers and Interfaces (Q4802628):
Displaying 22 items.
- HEX: scaling honeycombs is easier than scaling clock trees (Q269518) (← links)
- Localities in systems with a/sync communication (Q418785) (← links)
- Regions of Petri nets with a/sync connections (Q714824) (← links)
- Applying regions (Q728281) (← links)
- STG decomposition strategies in combination with unfolding (Q1031867) (← links)
- Verification of asynchronous systems with an unspecified component (Q1731830) (← links)
- Bounded choice-free Petri net synthesis: algorithmic issues (Q1789066) (← links)
- Synthesising elementary net systems with localities (Q2077411) (← links)
- Edge, event and state removal: the complexity of some basic techniques that make transition systems Petri net implementable (Q2117174) (← links)
- Synthesis of inhibitor-reset Petri nets: algorithmic and complexity issues (Q2165238) (← links)
- Avoiding exponential explosion in Petri net models of control flows (Q2165241) (← links)
- An extension of the taxonomy of persistent and nonviolent steps (Q2293146) (← links)
- Step semantics of Boolean nets (Q2376982) (← links)
- Component refinement and CSC-solving for STG decomposition (Q2464945) (← links)
- Concurrency in synchronous systems (Q2505637) (← links)
- Rigorously modeling self-stabilizing fault-tolerant circuits: an ultra-robust clocking scheme for systems-on-chip (Q2637656) (← links)
- Petri Net Synthesis for Restricted Classes of Nets (Q2822652) (← links)
- Elasticity and Petri Nets (Q3599221) (← links)
- Target-oriented Petri Net Synthesis (Q4988954) (← links)
- Asynchronous Logic Circuits and Sheaf Obstructions (Q5179025) (← links)
- A Case for Using Signal Transition Graphs for Analysing and Refining Genetic Networks (Q5179422) (← links)
- Step Persistence in the Design of GALS Systems (Q5300872) (← links)