The following pages link to Amir Moradi (Q656518):
Displayed 39 items.
- Side-channel resistant crypto for less than 2,300 GE (Q656520) (← links)
- Dual-rail transition logic: A logic style for counteracting power analysis attacks (Q1007304) (← links)
- Assessment of hiding the higher-order leakages in hardware. What are the achievements versus overheads? (Q1695898) (← links)
- Leakage assessment methodology. A clear roadmap for side-channel evaluations (Q1695902) (← links)
- Strong 8-bit sboxes with efficient masking in hardware (Q1695970) (← links)
- Bridging the gap: advanced tools for side-channel leakage estimation beyond Gaussian templates and histograms (Q1698615) (← links)
- Spin me right round rotational symmetry for FPGA-specific AES: extended version (Q2188965) (← links)
- The first thorough side-channel hardware Trojan (Q2412894) (← links)
- SILVER -- statistical independence and leakage verification (Q2692368) (← links)
- Arithmetic Addition over Boolean Masking (Q2794517) (← links)
- Affine Equivalence and Its Application to Tightening Threshold Implementations (Q2807212) (← links)
- The SKINNY Family of Block Ciphers and Its Low-Latency Variant MANTIS (Q2829213) (← links)
- ParTI – Towards Combined Hardware Countermeasures Against Side-Channel and Fault-Injection Attacks (Q2829219) (← links)
- On the Simplicity of Converting Leakages from Multivariate to Univariate (Q2851412) (← links)
- Black-Box Side-Channel Attacks Highlight the Importance of Countermeasures (Q2889990) (← links)
- Statistical Tools Flavor Side-Channel Collision Attacks (Q2894422) (← links)
- Comprehensive Evaluation of AES Dual Ciphers as a Side-Channel Countermeasure (Q2920971) (← links)
- Wire-Tap Codes as Side-Channel Countermeasure (Q2945395) (← links)
- Full-Size High-Security ECC Implementation on MSP430 Microcontrollers (Q2946464) (← links)
- Side-Channel Analysis Protection and Low-Latency in Action (Q2958135) (← links)
- Hiding Higher-Order Side-Channel Leakage (Q2975801) (← links)
- Pushing the Limits: A Very Compact and a Threshold Implementation of AES (Q3003375) (← links)
- Generic Side-Channel Countermeasures for Reconfigurable Devices (Q3172963) (← links)
- Threshold Implementation in Software (Q3297560) (← links)
- A First-Order SCA Resistant AES Without Fresh Randomness (Q3297561) (← links)
- Practical Power Analysis Attacks on Software Implementations of McEliece (Q3569141) (← links)
- Correlation-Enhanced Power Analysis Collision Attack (Q3583445) (← links)
- On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoq Code Hopping Scheme (Q3600221) (← links)
- On the Importance of the Number of Fanouts to Prevent the Glitches in DPA-Resistant Devices (Q3628495) (← links)
- Bitstream Fault Injections (BiFI)–Automated Fault Attacks Against SRAM-Based FPGAs (Q4567311) (← links)
- GliFreD: Glitch-Free Duplication Towards Power-Equalized Circuits on FPGAs (Q4567315) (← links)
- White-Box Cryptography in the Gray Box (Q4639477) (← links)
- Bit-Sliding: A Generic Technique for Bit-Serial Implementations of SPN-based Primitives (Q5114657) (← links)
- Impeccable Circuits (Q5125862) (← links)
- Detecting Hidden Leakages (Q5168549) (← links)
- Improved Side-Channel Analysis Attacks on Xilinx Bitstream Encryption of 5, 6, and 7 Series (Q5204755) (← links)
- Early Propagation and Imbalanced Routing, How to Diminish in FPGAs (Q5265096) (← links)
- One Attack to Rule Them All: Collision Timing Attack versus 42 AES ASIC Cores (Q5274504) (← links)
- Energy consumption of protected cryptographic hardware cores. An experimental study (Q6088711) (← links)