Synthezising the F8 cryptographic algorithm for programmable devices
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Synthezising the \(F8\) cryptographic algorithm for programmable devices
Recommendations
- Parallel algorithms development for programmable devices with application from cryptography
- Design and implementation of cryptographic modules on FPGAs
- Hardware implementation analysis of SHA-256 and SHA-512 algorithms on FPGAs
- scientific article; zbMATH DE number 2090643
- scientific article; zbMATH DE number 2090599
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