Techniques for efficiently implementing totally self-checking checkers in MOS technology
From MaRDI portal
m-out-of-n and Berger code checkersreducing the transistor count of MOS implementations of totally self- checking (TSC) checkers
Recommendations
Cites work
- Complete Test Sets for Logic Functions
- Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor
- Efficient Design of Self-Checking Checker for any m-Out-of-n Code
- Note on Self-Checking Checkers
- On Totally Self-Checking Checkers for Separable Codes
- Techniques for efficiently implementing totally self-checking checkers in MOS technology
Cited in
(8)- Study of combinational self-checking devices with independent and monotonic independent outputs
- PLA Implementation of k-out-of-n Code TSC Checker
- A Theory of Totally Self-Checking System Design
- Efficient totally self-checking checkers for a class of Borden codes
- Low-cost modular totally self-checking checker design for m-out-of-n code
- scientific article; zbMATH DE number 3869228 (Why is no real title available?)
- Universal algorithm for synthesizing self-checking testers for constant- weight codes
- Techniques for efficiently implementing totally self-checking checkers in MOS technology
This page was built for publication: Techniques for efficiently implementing totally self-checking checkers in MOS technology
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q1101080)
