Transition Count Testing of Combinational Logic Circuits

DOI10.1109/TC.1976.1674661MaRDI QIDQ4097190zbMATH OpenOpenAlexFDO

Authors John P. Hayes

Publication date 1976

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.1976.1674661

Mathematics Subject Classification ID

Cited in

(4)

• BIST design for detecting multiple stuck-open faults in CMOS circuits using transition count
• An analysis of root functions -- a subclass of the impossible class of faulty functions (ICFF)
• MODIFIED TRANSITION MATRIX AND FAULT TESTING IN SEQUENTIAL LOGIC CIRCUITS UNDER RANDOM STIMULI WITH A SPECIFIED MEASURE OF CONFIDENCE
• Quick detection of faults in combinational networks designed in minterm format by computing a single novel parameter

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