Variable Latency Speculative Parallel Prefix Adders for Unsigned and Signed Operands

DOI10.1109/TCSI.2016.2564699MaRDI QIDQ5007400zbMATH OpenOpenAlexFDO

Authors Darjn Esposito, Davide de Caro, Antonio Giuseppe Maria Strollo

Publication date 26 August 2021

Published in IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tcsi.2016.2564699

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

Cited in

(1)

• Fast prefix adders for non-uniform input arrival times

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