Verification by Parallelization of Parametric Code

DOI10.1007/978-3-540-75939-3_10MaRDI QIDQ5426003zbMATH OpenOpenAlexFDO

Authors Tobias Gedell, Reiner Hähnle

Publication date 15 November 2007

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-540-75939-3_10

zbMATH Keywords

automated first-order reasoningformal software verificationparallelizable loopssymbolic dependence analysis

Mathematics Subject Classification ID

Mathematical aspects of software engineering (specification, verification, metrics, requirements, etc.) (68N30) Specification and verification (program logics, model checking, etc.) (68Q60)

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Cites work

• Algebraic Methodology and Software Technology
• Automating Verification of Loops by Parallelization
• Fundamental Approaches to Software Engineering
• scientific article; zbMATH DE number 1706329 (Why is no real title available?)
• scientific article; zbMATH DE number 193479 (Why is no real title available?)
• scientific article; zbMATH DE number 194119 (Why is no real title available?)
• scientific article; zbMATH DE number 1556014 (Why is no real title available?)
• scientific article; zbMATH DE number 1905113 (Why is no real title available?)
• Integrated Formal Methods
• Programming Languages and Systems
• Rippling: Meta-Level Guidance for Mathematical Reasoning
• Sequential, Parallel, and Quantified Updates of First-Order Structures
• Theorem Proving in Higher Order Logics
• Theoretical Aspects of Computing - ICTAC 2004
• Time and Parallel Processor Bounds for Fortran-Like Loops

Cited in

(1)

• Automating Verification of Loops by Parallelization

Describes a project that uses

Uses Software

• Spec#
• NQTHM
• ESC/Java

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