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This page lists pages that use the given entity (e.g. Q42). The list is sorted by descending page ID, so that newer pages are listed first.

List of pages that use a given entity

Showing below up to 50 results in range #1 to #50.

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  1. A verified durable transactional mutex lock for persistent x86-TSO: Label: en
  2. Formally understanding Rust's ownership and borrowing system at the memory level: Label: en
  3. The hexatope and octatope abstract domains for neural network verification: Label: en
  4. Runtime verification of partially-synchronous distributed system: Label: en
  5. Thread-modular counter abstraction: automated safety and termination proofs of parameterized software by reduction to sequential program verification: Label: en
  6. Practical algebraic calculus and Nullstellensatz with the checkers Pacheck and Pastèque and Nuss-Checker: Label: en
  7. Distributed bounded model checking: Label: en
  8. Extended bounded response LTL: a new safety fragment for efficient reactive synthesis: Label: en
  9. Porous invariants for linear systems: Label: en
  10. Introducing robust reachability: Label: en
  11. Partial bounding for recursive function synthesis: Label: en
  12. Memory access protocols: certified data-race freedom for GPU kernels: Label: en
  13. Isla: integrating full-scale ISA semantics and axiomatic concurrency models (extended version): Label: en
  14. Global guidance for local generalization in model checking: Label: en
  15. Stochastic games with lexicographic objectives: Label: en
  16. Hashing-based approximate counting of minimal unsatisfiable subsets: Label: en
  17. Preface of the special issue on the conference on computer-aided verification 2020 and 2021: Label: en
  18. Dynamic dependability analysis of shuffle-exchange networks: Label: en
  19. Mining of extended signal temporal logic specifications with ParetoLib 2.0: Label: en
  20. Parameter synthesis for Markov models: covering the parameter space: Label: en
  21. Bounded-memory runtime enforcement with probabilistic and performance analysis: Label: en
  22. Extending rely-guarantee thinking to handle real-time scheduling: Label: en
  23. Certified SAT solving with GPU accelerated inprocessing: Label: en
  24. Round- and context-bounded control of dynamic pushdown systems: Label: en
  25. Compositional verification of priority systems using sharp bisimulation: Label: en
  26. Integrating ADTs in KeY and their application to history-based reasoning about collection: Label: en
  27. Fingerprinting and analysis of Bluetooth devices with automata learning: Label: en
  28. Runtime verification of real-time event streams using the tool HStriver: Label: en
  29. Preface for the formal methods in system design special issue on `Formal Methods 2021': Label: en
  30. Symbolic encoding of LL(1) parsing and its applications: Label: en
  31. Church synthesis on register automata over linearly ordered data domains: Label: en
  32. Dissecting \texttt{ltlsynt}: Label: en
  33. \textsc{Synbit}: synthesizing bidirectional programs using unidirectional sketches: Label: en
  34. Enhancing active model learning with equivalence checking using simulation relations: Label: en
  35. Finite-trace and generalized-reactivity specifications in temporal synthesis: Label: en
  36. Preface for the formal methods in system design special issue on SYNT 2021: Label: en
  37. Concise outlines for a complex logic: a proof outline checker for TaDA: Label: en
  38. The probabilistic termination tool amber: Label: en
  39. Reluplex: a calculus for reasoning about deep neural networks: Label: en
  40. Static detection of uncoalesced accesses in GPU programs: Label: en
  41. Distributed parametric model checking timed automata under non-zenoness assumption: Label: en
  42. Compositional runtime enforcement revisited: Label: en
  43. From LTL to rLTL monitoring: improved monitorability through robust semantics: Label: en
  44. Automated repair for timed systems: Label: en
  45. Relational abstract interpretation of arrays in assembly code: Label: en
  46. Equivalence checking and intersection of deterministic timed finite state machines: Label: en
  47. Bridging the gap between single- and multi-model predictive runtime verification: Label: en
  48. Cut-off theorems for the \textit{PV}-model: Label: en
  49. The complexity gap in the static analysis of cache accesses grows if procedure calls are added: Label: en
  50. Correction to: ``Parameterized verification of leader/follower systems via first-order temporal logic: Label: en

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