Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness (Q3340134): Difference between revisions
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Property / author: Sartaj K. Sahni / rank | |||
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Latest revision as of 02:20, 20 March 2024
scientific article
Language | Label | Description | Also known as |
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English | Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness |
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Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness (English)
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1984
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preemptive scheduling
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maximum lateness
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memory requirements
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