Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness
From MaRDI portal
Publication:3340134
DOI10.1137/0213043zbMath0548.68027MaRDI QIDQ3340134
Sartaj K. Sahni, Ten-Hwang Lai
Publication date: 1984
Published in: SIAM Journal on Computing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1137/0213043
68M20: Performance evaluation, queueing, and scheduling in the context of computer systems
Related Items