Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness

DOI10.1137/0213043zbMATH Open0548.68027OpenAlexW2022975943MaRDI QIDQ3340134FDOQ3340134

Sartaj Sahni, Ten H. Lai

Publication date: 1984

Published in: SIAM Journal on Computing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1137/0213043

zbMATH Keywords

maximum latenesspreemptive schedulingmemory requirements

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Cited In (4)

• Scheduling parallel machines with inclusive processing set restrictions and job release times
• Preemptive scheduling of multiprocessor tasks on the dedicated processor system subject to minimal lateness
• Title not available (Why is that?)
• The maximum gain of increasing the number of preemptions in multiprocessor scheduling

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