A single layer zero skew clock routing in X architecture (Q848302): Difference between revisions
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| Property / full work available at URL: https://doi.org/10.1007/s11432-009-0028-6 / rank | |||
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| Property / cites work: Zero skew clock routing with minimum wirelength / rank | |||
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| Property / cites work: Reliable buffered clock tree routing algorithm with process variation tolerance / rank | |||
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Latest revision as of 11:57, 2 July 2024
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A single layer zero skew clock routing in X architecture |
scientific article |
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A single layer zero skew clock routing in X architecture (English)
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3 March 2010
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clock routing
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single layer
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X architecture
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zero skew
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