Automatic and hierarchical verification for concurrent systems (Q2277847): Difference between revisions

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+The temporal logic of branching time
@@ Property / cites work: The temporal logic of branching time / rank @@
+Normal rank
@@ Property / cites work @@
+Automatic Verification of Sequential Circuits Using Temporal Logic
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@@ Property / cites work @@
+Automatic verification of finite-state concurrent systems using temporal logic specifications
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@@ Property / cites work @@
+“Sometimes” and “not never” revisited
@@ Property / cites work: “Sometimes” and “not never” revisited / rank @@
+Normal rank
@@ Property / cites work @@
+Q3922147
@@ Property / cites work: Q3922147 / rank @@
+Normal rank
@@ Property / cites work @@
+Hierarchical verification of asynchronous circuits using temporal logic
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@@ Property / full work available at URL @@
+https://doi.org/10.1007/bf02945312
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@@ Property / OpenAlex ID @@
+W2077833819
@@ Property / OpenAlex ID: W2077833819 / rank @@
+Normal rank