Asynchronous Logic Circuits and Sheaf Obstructions (Q5179025): Difference between revisions

@@ Property / MaRDI profile type @@
+MaRDI publication profile
@@ Property / MaRDI profile type: MaRDI publication profile / rank @@
+Normal rank
@@ Property / OpenAlex ID @@
+W2078034056
@@ Property / OpenAlex ID: W2078034056 / rank @@
+Normal rank
@@ Property / Wikidata QID @@
+Q113318116
@@ Property / Wikidata QID: Q113318116 / rank @@
+Normal rank
@@ Property / arXiv ID @@
+.2729
@@ Property / arXiv ID: 1008.2729 / rank @@
+Normal rank
@@ Property / cites work @@
+Q5548009
@@ Property / cites work: Q5548009 / rank @@
+Normal rank
@@ Property / cites work @@
+Q3125206
@@ Property / cites work: Q3125206 / rank @@
+Normal rank
@@ Property / cites work @@
+Automatic Verification of Sequential Circuits Using Temporal Logic
+Normal rank
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+On the delay-sensitivity of gate networks
@@ Property / cites work: On the delay-sensitivity of gate networks / rank @@
+Normal rank
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+Normal rank
@@ Property / cites work @@
+Logic Synthesis for Asynchronous Controllers and Interfaces
+Normal rank
@@ Property / cites work @@
+Q5302560
@@ Property / cites work: Q5302560 / rank @@
+Normal rank
@@ Property / cites work @@
+Q4845486
@@ Property / cites work: Q4845486 / rank @@
+Normal rank
@@ Property / cites work @@
+Q5551191
@@ Property / cites work: Q5551191 / rank @@
+Normal rank
@@ Property / cites work @@
+Compiling communicating processes into delay-insensitive VLSI circuits
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+On several geometric aspects of nonlinear networks
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+A timing refinement of intuitionistic proofs and its application to the timing analysis of combinational circuits
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+Normal rank
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+AN APPLICATION OF ALGEBRAIC TOPOLOGY TO NUMERICAL ANALYSIS: ON THE EXISTENCE OF A SOLUTION TO THE NETWORK PROBLEM
+Normal rank
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+On the mathematical foundations of electrical circuit theory
+Normal rank
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+Asynchronous operators of sequential logic: Venjunction \& sequention. Digital circuit analysis and design
+Normal rank
@@ links / mardi / name / links / mardi / name @@
+Publication:5179025