Easy test generation PLAs (Q1095867): Difference between revisions
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scientific article
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English | Easy test generation PLAs |
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Easy test generation PLAs (English)
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1987
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Test Generation for large circuits may be extremely difficult. One of the approaches to alleviating this problem is to consider the difficulties during the design cycle. This paper proposes a design of Easy Test Generation Programmable Logic Arrays (ETG PLAs), for which test generation is basically not required, since a complete test set can be generated while the test is applied. This paper also presents a procedure which makes a PLA an ETG PLA by following some design rules and providing reasonable extra hardware.
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Test Generation
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large circuits
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Programmable Logic Arrays
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complete test set
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hardware
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