Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness (Q3340134): Difference between revisions

From MaRDI portal
Added link to MaRDI item.
RedirectionBot (talk | contribs)
Removed claims
Property / author
 
Property / author: Ten-Hwang Lai / rank
Normal rank
 
Property / author
 
Property / author: Sartaj K. Sahni / rank
Normal rank
 

Revision as of 10:36, 20 February 2024

scientific article
Language Label Description Also known as
English
Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness
scientific article

    Statements

    Preemptive Scheduling of a Multiprocessor System with Memories to Minimize Maximum Lateness (English)
    0 references
    0 references
    1984
    0 references
    0 references
    preemptive scheduling
    0 references
    maximum lateness
    0 references
    memory requirements
    0 references