Modelling and verification of delay-insensitive circuits using CCS and the concurrency workbench (Q1029101)
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| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Modelling and verification of delay-insensitive circuits using CCS and the concurrency workbench |
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Statements
Modelling and verification of delay-insensitive circuits using CCS and the concurrency workbench (English)
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9 July 2009
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formal methods
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specification languages
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formal verification
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asynchronous logic
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