River routing in VLSI (Q1102106)

From MaRDI portal
Revision as of 02:46, 31 January 2024 by Import240129110113 (talk | contribs) (Added link to MaRDI item.)
scientific article
Language Label Description Also known as
English
River routing in VLSI
scientific article

    Statements

    River routing in VLSI (English)
    0 references
    0 references
    1987
    0 references
    The main result of this well written and interesting paper is an O(n) time algorithm for the optimum offset problem in single-layer river routing. The result is achieved using a halving technique which is claimed to be new, but is merely a variant of the old divide-and-conquer paradigm. Algorithms for the minimum area, minimum longest wire length and minimum total wire length problems are also given that take \(O(n^ 2)\) time.
    0 references
    0 references
    VLSI layout
    0 references
    algorithm design technique
    0 references
    single-layer wiring
    0 references
    river routing
    0 references