A Scalable Successive-Cancellation Decoder for Polar Codes

DOI10.1109/TSP.2014.2347262MaRDI QIDQ4579512zbMATH OpenOpenAlexFDO

Authors Alexandre J. Raymond, Warren J. Gross

Publication date 22 August 2018

Published in IEEE Transactions on Signal Processing (Search for Journal in Brave)

Full work available at URL https://arxiv.org/abs/1306.3529

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12) Source coding (94A29) Decoding (94B35)

Abstract: Polar codes, discovered by Ar{i}kan, are the first error-correcting codes with an explicit construction to provably achieve channel capacity, asymptotically. However, their error-correction performance at finite lengths tends to be lower than existing capacity-approaching schemes. Using the successive-cancellation algorithm, polar decoders can be designed for very long codes, with low hardware complexity, leveraging the regular structure of such codes. We present an architecture and an implementation of a scalable hardware decoder based on this algorithm. This design is shown to scale to code lengths of up to N = 2^20 on an Altera Stratix IV FPGA, limited almost exclusively by the amount of available SRAM.

Cited in

(4)

• A Semi-Parallel Successive-Cancellation Decoder for Polar Codes
• An Efficient Partial-Sum Network Architecture for Semi-Parallel Polar Codes Decoder Implementation
• Multi-Gb/s Software Decoding of Polar Codes
• Recursive descriptions of polar codes

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