A graph-theoretic multiple logic fault analysis through petri-nets

DOI10.1080/00207168808803663MaRDI QIDQ3806835zbMATH OpenOpenAlexFDO

Authors Ranajit Kishore Thakur, Kripasindhu Chaudhuri

Publication date 1988

Published in International Journal of Computer Mathematics (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1080/00207168808803663

zbMATH Keywords

Boolean differencecomplete test setfault detectionlogic circuitPetri net

Mathematics Subject Classification ID

Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85) Graph theory (including graph drawing) in computer science (68R10) Applications of graph theory to circuits and networks (94C15)

Recommendations

• Algebraic analysis of multiple faults in combinational networks
• ANALYZING MULTIPLE FAULTS IN SYNCHRONOUS SEQUENTIAL CIRCUITS BY BOOLEAN DIFFERENCE TECHNIQUES
• scientific article; zbMATH DE number 5009350
• Analysis of the fault tolerance of complex systems by extensions of Petri nets
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Cites work

• An Efficient Algorithm for Generating Complete Test Sets for Combinational Logic Circuits
• Analyzing Errors with the Boolean Difference
• Boolean Difference Calculus and Fault Finding
• Derivation of Minimal Complete Sets of Test-Input Sequences Using Boolean Differences
• Path Sensitization, Partial Boolean Difference, and Automated Fault Diagnosis
• The Boolean Difference and Multiple Fault Analysis

Cited in

(3)

• Analysis of the fault tolerance of complex systems by extensions of Petri nets
• ANALYZING MULTIPLE FAULTS IN SYNCHRONOUS SEQUENTIAL CIRCUITS BY BOOLEAN DIFFERENCE TECHNIQUES
• scientific article; zbMATH DE number 3930360 (Why is no real title available?)

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