A hierarchical block-floating-point arithmetic

DOI10.1023/A:1008110410087MaRDI QIDQ1974486zbMATH OpenOpenAlexFDO

Authors Shiro Kobayashi, Gerhard P. Fettweis

Publication date 7 May 2000

Published in Journal of VLSI signal processing systems for signal, image and video technology (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1023/a:1008110410087

zbMATH Keywords

DSP architecturesmobile communication

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07)

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