Lightweight floating-point arithmetic: Case study of inverse discrete cosine transform

DOI10.1155/S1110865702205090MaRDI QIDQ1773575zbMATH OpenFDO

Authors Fang Fang, Tsuhan Chen, Rob A. Rutenbar

Publication date 3 May 2005

Published in EURASIP Journal on Applied Signal Processing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1155/S1110865702205090

Mathematics Subject Classification ID

Numerical methods for trigonometric approximation and interpolation (65T40) Image processing (compression, reconstruction, etc.) in information and communication theory (94A08) Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

Review text

Summary: To enable floating-point (FP) signal processing applications in low-power mobile devices, we propose lightweight floating-point arithmetic. It offers a wider range of precision/power/speed/area trade-offs, but is wrapped in forms that hide the complexity of the underlying implementations from both multimedia software designers and hardware designers. Libraries implemented in C++ and Verilog provide flexible and robust floating-point units with variable bit-width formats, multiple rounding modes and other features. This solution bridges the design gap between software and hardware, and accelerates the design cycle from algorithm to chip by avoiding the translation to fixed-point arithmetic. We demonstrate the effectiveness of the proposed scheme using the inverse discrete cosine transform (IDCT), in the context of video coding, as an example. Further, we implement lightweight floating-point IDCT into hardware and demonstrate the power and area reduction.

Recommendations

• A low power approach to floating point adder design for DSP application
• A hierarchical block-floating-point arithmetic
• A compact DSP core with static floating-point arithmetic
• scientific article; zbMATH DE number 1941105
• scientific article; zbMATH DE number 1941118

Cited in

(5)

• A hierarchical block-floating-point arithmetic
• A compact DSP core with static floating-point arithmetic
• LNS with Co-Transformation Competes with Floating-Point
• Performance and accuracy of hardware-oriented native-, emulated- and mixed-precision solvers in FEM simulations
• A low power approach to floating point adder design for DSP application

This page was built for publication: Lightweight floating-point arithmetic: Case study of inverse discrete cosine transform

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q1773575)