Accelerating test, validation and debug of high speed serial interfaces

DOI10.1007/978-90-481-9398-1MaRDI QIDQ3577044zbMATH OpenOpenAlexFDO

Authors Yongquan Fan, Zeljko Zilic

Publication date 3 August 2010

Full work available at URL https://doi.org/10.1007/978-90-481-9398-1

zbMATH Keywords

high performance Gaussian noise generatorsjitter injection

Mathematics Subject Classification ID

Introductory exposition (textbooks, tutorial papers, etc.) pertaining to computer science (68-01) Computer system organization (68M99)

Recommendations

• scientific article; zbMATH DE number 994147
• Optimization of parallel-series self-testing for discrete devices
• scientific article; zbMATH DE number 2112813
• System-level validation. High-level modeling and directed test generation techniques.
• Recent advances in modeling and simulation of high-speed interconnects

This page was built for publication: Accelerating test, validation and debug of high speed serial interfaces

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3577044)