An Overflow-Free Residue Multiplier

DOI10.1109/TC.1983.1676263MaRDI QIDQ4750527zbMATH OpenOpenAlexFDO

Authors Fred Taylor

Publication date 1983

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.1983.1676263

zbMATH Keywords

architecteddynamic range overflowerror modelfixed-point multiplierresidue numbers

Mathematics Subject Classification ID

Communication theory (94A05)

Recommendations

• A low-complexity combinatorial RNS multiplier
• A Suggestion for a Fast Residue Multiplier for a Family of Moduli of the Form (2n - (2p   1))
• Novel high-radix residue number system architectures
• A high-speed residue-to-binary converter for three-moduli \((2^k, 2^k -1, 2^{k-1} -1)\) RNS and a scheme for its VLSI implementation
• Fast and highly compact RNS multipliers

Cited in

(3)

• Overflow and underflow in multiplication and division
• Design of residue generators and multioperand adders modulo 3 built of multioutput threshold circuits
• A Suggestion for a Fast Residue Multiplier for a Family of Moduli of the Form (2n - (2p   1))

This page was built for publication: An Overflow-Free Residue Multiplier

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4750527)