A low-complexity combinatorial RNS multiplier

DOI10.1109/82.958337MaRDI QIDQ4553208zbMATH OpenOpenAlexFDO

Authors Vassilis Paliouras, Konstantina Karagianni, T. Stouraitis

Publication date 25 November 2002

Published in IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/82.958337

zbMATH Keywords

digital arithmeticdigital signal processing applicationsmultiplicationresidue arithmeticvery large-scale integration

Mathematics Subject Classification ID

Congruences; primitive roots; residue systems (11A07) Mathematical problems of computer architecture (68M07) Signal theory (characterization, reconstruction, filtering, etc.) (94A12) Analytic circuit theory (94C05)

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(8)

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• Fast and highly compact RNS multipliers
• Novel approaches to the design of VLSI RNS multipliers
• An Overflow-Free Residue Multiplier
• A Low-Complexity High-Radix RNS Multiplier
• Method for designing efficient mixed radix multipliers
• A VLSI structure forX(modm) operation
• Efficient hardware implementation of finite fields with applications to cryptography

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