Efficient VLSI architectures for the advanced encryption standard algorithm

MaRDI QIDQ5430054zbMATH OpenFDO

Authors Xinmiao Zhang

Publication date 5 December 2007

zbMATH Keywords

algorithmic optimizationarchitectural optimizationcomposite field arithmeticcryptographyhardware implementation

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35) Cryptography (94A60)

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Cited in

(6)

• Efficient cryptography on the RISC-V architecture
• scientific article; zbMATH DE number 6719508 (Why is no real title available?)
• Architectures and VLSI implementations of the AES-Proposal Rijndael
• scientific article; zbMATH DE number 1844641 (Why is no real title available?)
• scientific article; zbMATH DE number 1882019 (Why is no real title available?)
• Advanced Encryption Standard – AES

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