Efficient optimization by modifying the objective function: applications to timing-driven VLSI layout

DOI10.1109/81.940185MaRDI QIDQ4540170zbMATH OpenOpenAlexFDO

Authors Ross Baldick, Andrew B. Kahng, Andrew Kennings, Igor L. Markov

Publication date 21 July 2002

Published in IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications (Search for Journal in Brave)

Full work available at URL https://semanticscholar.org/paper/34904fac2c33c122d0351537b85b3497dfdd87f5

zbMATH Keywords

approximationsmultivariate convex piecewise-linear functionsNewton-type algorithmsnonlinear delay estimationsVLSI layout

Mathematics Subject Classification ID

Combinatorial optimization (90C27) Circuits, networks (94C99)

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Cited in

(3)

• A PSO-based timing-driven octilinear Steiner tree algorithm for VLSI routing considering bend reduction
• Nesterov's smoothing and excessive gap methods for an optimization problem in VLSI placement
• Efficient preprocessing for VLSI optimization problems

Describes a project that uses

Uses Software

• KELLEY

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