Optimal module sizing in VLSI floorplanning by nonlinear programming
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Cited in
(27)- A nonlinear optimization methodology for VLSI fixed-outline floorplanning
- A tutorial on geometric programming
- Floorplan design of VLSI circuits
- Optimal cell flipping to minimize channel density in VLSI design and pseudo-Boolean optimization
- Complexity and approximability results for slicing floorplan designs.
- On duality for a class of quasiconcave multiplicative programs
- An optimum placement search algorithm based on extended corner block list.
- An accelerated extended cutting plane approach with piecewise linear approximations for signomial geometric programming
- StreamTable: an area proportional visualization for tables with flowing streams
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- Optimal orientations of cells in slicing floorplan designs
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- How good are slicing floorplans?
- VLSI floorplanning based on the integration of adaptive search models
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- Optimal compactification of a floorplan and its relation to other optimization problems-a dynamic programming approach
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- Graph-based techniques to speed up floorplan area optimization
- Compact floor-planning via orderly spanning trees
- Efficient optimization by modifying the objective function: applications to timing-driven VLSI layout
- A post-floorplanning wire length optimization algorithm based on integer linear programming
- Computing and Combinatorics
- Rectangle placement for VLSI testing
- Computing cartograms with optimal complexity
- Corner block list representation and its application with boundary constraints
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