Linear placement algorithms and applications to VLSI design

DOI10.1002/NET.3230170406MaRDI QIDQ3783832zbMATH OpenOpenAlexFDO

Authors Chung-Kuan Cheng

Publication date 1987

Published in Networks (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1002/net.3230170406

zbMATH Keywords

design of integrated circuitsheuristic algorithmjob sequencingliner placement techniquenetwork flowparallel graphspolynomial-time algorithmsum of wiring lengthsVery Large Scale Integrated CircuitsVLSI placement

Mathematics Subject Classification ID

Numerical mathematical programming methods (65K05) Production models (90B30) Deterministic scheduling theory in operations research (90B35)

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Cites work

• An Efficient Heuristic Procedure for Partitioning Graphs
• One-dimensional logic gate assignment and interval graphs
• Single-Machine Job Sequencing with Treelike Precedence Ordering and Linear Delay Penalties

Cited in

(19)

• Geometric quadrisection in linear time, with application to VLSI placement
• An assignment algorithm with applications to integrated circuit layout
• Models and algorithms for structured layout
• Efficient algorithms for single- and two-layer linear placement of parallel graphs
• Solving VLSI physical design problems on a vector machine
• Fast simulated annealing for single-row equidistant facility layout
• Determinstic VLSI block placement algorithm using less flexibility first principle
• The placement model and its nonlinear placement solver for VLSI global placement
• Theory and practice of VLSI placement
• Incremental Processing Applied to Munkres’ Algorithm and Its Application in Steinberg’s Placement Procedure
• scientific article; zbMATH DE number 4043771 (Why is no real title available?)
• A timing-driven placement algorithm with the Elmore delay model for row-based VLSIs
• VLSI Placement Using Quadratic Programming and Network Partitioning Techniques
• scientific article; zbMATH DE number 139786 (Why is no real title available?)
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• Efficient optimization by modifying the objective function: applications to timing-driven VLSI layout
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• Algorithms for VLSI placement
• Molecular solution to the optimal linear arrangement problem based on DNA computation

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