Expansion of layouts of complete binary trees into grids

DOI10.1016/S0166-218X(02)00550-4MaRDI QIDQ1414240zbMATH OpenFDO

Authors D. Massart, Yan Bin Lin, Z. Miller, Manley Perkel, Daniel Pritikin, I. H. Sudborough

Publication date 20 November 2003

Published in Discrete Applied Mathematics (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/S0166-218X(02)00550-4

zbMATH Keywords

optimal VLSI design

Mathematics Subject Classification ID

Planar graphs; geometric and topological aspects of graph theory (05C10) Graph theory (including graph drawing) in computer science (68R10)

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Cites work

• Efficient Embeddings of Binary Trees in VLSI Arrays
• Embeddings of complete binary trees into grids and extended grids with total vertex-congestion 1
• Embeddings of treelike graphs into 2-dimensional meshes
• scientific article; zbMATH DE number 2123123 (Why is no real title available?)
• scientific article; zbMATH DE number 4147467 (Why is no real title available?)
• scientific article; zbMATH DE number 52113 (Why is no real title available?)
• scientific article; zbMATH DE number 219230 (Why is no real title available?)
• Optimizing area and aspect ratio in straight-line orthogonal tree drawings
• The complexity of minimizing wire lengths in VLSI layouts
• Unit-length embedding of binary trees on a square grid
• Universality considerations in VLSI circuits

Cited in

(4)

• Embeddings of complete binary trees into grids and extended grids with total vertex-congestion 1
• Complexity dichotomy on degree-constrained VLSI layouts with unit-length edges
• Complexity dichotomy on partial grid recognition
• Complete binary trees embeddings in Möbius cubes

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