Flash-Aware RAID Techniques for Dependable and High-Performance Flash Memory SSD

DOI10.1109/TC.2010.197MaRDI QIDQ5280647zbMATH OpenFDO

Authors Soojun Im, Dongkun Shin

Publication date 27 July 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/TC.2010.197

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Cited in

(6)

• High-Performance and Lightweight Transaction Support in Flash-Based SSDs
• Exploiting Compression-Induced Internal Fragmentation for Power-Off Recovery in SSD
• Improving Read Performance of NAND Flash SSDs by Exploiting Error Locality
• Chip-Level RAID with Flexible Stripe Size and Parity Placement for Enhanced SSD Reliability
• Joint Decoder Design for SSDs
• Reliability Enhancement of Flash-Memory Storage Systems: An Efficient Version-Based Design

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