FoCs -- automatic generation of simulation checkers from formal specifications

DOI10.1007/10722167_40MaRDI QIDQ2754115zbMATH OpenFDO

Authors Yael Abarbanel-Vinov, Ilan Beer, Leonid Gluhovsky, Sharon Keidar, Yaron Wolfsthal

Publication date 17 December 2001

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/10722167_40

Mathematics Subject Classification ID

Mathematical problems of computer architecture (68M07) Specification and verification (program logics, model checking, etc.) (68Q60) Computing methodologies and applications (68U99)

Cited in

(10)

• FoCs
• Optimized temporal monitors for SystemcC
• Verification approach of Metropolis design framework for embedded systems
• Foundations of Boolean stream runtime verification
• A rewriting semantics for ABEL with applications to hardware/software co-design and analysis
• Functional specification of hardware via temporal logic
• Runtime verification of embedded real-time systems
• Checking Temporal Properties of Discrete, Timed and Continuous Behaviors
• Analog property checkers: a DDR2 case study
• Embedding finite automata within regular expressions

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