GATE RESIZING TO REDUCE POWER CONSUMPTION

DOI10.1142/S0129054102001187MaRDI QIDQ3021961zbMATH OpenOpenAlexFDO

Authors Edward Y. C. Cheng, Sartaj Sahni

Publication date 22 June 2005

Published in International Journal of Foundations of Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1142/s0129054102001187

zbMATH Keywords

gate resizingpower consumptiontiming constraints

Mathematics Subject Classification ID

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