Hardware implementation of pairings
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Recommendations
- FPGA and ASIC implementations of the \(\eta _T\) pairing in characteristic three
- Efficient Hardware for the Tate Pairing Calculation in Characteristic Three
- Hardware architectures for the Tate pairing over GF\((2^{m})\)
- scientific article; zbMATH DE number 1979307
- Software Implementation of Finite Fields of Characteristic Three, for Use in Pairing-based Cryptosystems
Cited in
(14)- Software Implementation of Finite Fields of Characteristic Three, for Use in Pairing-based Cryptosystems
- FPGA and ASIC implementations of the \(\eta _T\) pairing in characteristic three
- Hardware Acceleration of the Tate Pairing in Characteristic Three
- Implementing complete formulas on Weierstrass curves in hardware
- Instruction Set Extensions for Pairing-Based Cryptography
- On hardware and software implementation of arithmetic in finite fields of characteristic 7 for calculation of pairings
- A Comparison between Hardware Accelerators for the Modified Tate Pairing over $\mathbb{F}_{2^m}$ and $\mathbb{F}_{3^m}$
- A Coprocessor for the Final Exponentiation of the η T Pairing in Characteristic Three
- Efficient pairings and ECC for embedded systems
- Efficient Hardware for the Tate Pairing Calculation in Characteristic Three
- Hardware architectures for the Tate pairing over GF\((2^{m})\)
- FPGA implementation of pairings using residue number system and lazy reduction
- scientific article; zbMATH DE number 1979307 (Why is no real title available?)
- Hydra: an energy-efficient programmable cryptographic coprocessor supporting elliptic-curve pairings over fields of large characteristics
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