High performance memory systems.

MaRDI QIDQ4458554zbMATH OpenFDO

Authors

Publication date 21 March 2004

zbMATH Keywords

microprocessor technologyscalability

Mathematics Subject Classification ID

Proceedings, conferences, collections, etc. pertaining to computer science (68-06) Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

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Cited in

(4)

• Architecture technique trade-offs using mean memory delay time
• Software controlled reconfigurable on-chip memory for high performance computing
• The Gilgamesh MIND processor-in-memory architecture for Petaflops-scale computing (extended abstract)
• Achieving scalable locality with time skewing

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