Software controlled reconfigurable on-chip memory for high performance computing

DOI10.1007/3-540-44570-6_2MaRDI QIDQ4535774zbMATH OpenFDO

Authors Hiroshi Nakamura, Masaaki Kondo, Taisuke Boku

Publication date 5 November 2002

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/3-540-44570-6_2

zbMATH Keywords

SCIMAVLSI architecture

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Computing methodologies and applications (68U99)

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Cited in

(1)

• Memory synthesis for FPGA-based reconfigurable computers

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