Hsie-Chia Chang
From MaRDI portal
List of research outcomes
This list is not complete and representing at the moment only items from zbMATH Open and arXiv. We are working on additional sources - please check back here soon!
| Publication | Date of Publication | Type |
|---|---|---|
| High-Efficiency Processing Schedule for Parallel Turbo Decoders Using QPP Interleaver IEEE Transactions on Circuits and Systems I: Regular Papers | 2021-08-26 | Paper |
| Jointly Designed Nonbinary LDPC Convolutional Codes and Memory-Based Decoder Architecture IEEE Transactions on Circuits and Systems I: Regular Papers | 2021-08-26 | Paper |
| Self-Compensation Technique for Simplified Belief-Propagation Algorithm IEEE Transactions on Signal Processing | 2018-06-12 | Paper |
| Design of a power-reduction Viterbi decoder for WLAN applications IEEE Transactions on Circuits and Systems I: Regular Papers | 2017-11-20 | Paper |
| Turbo decoder architecture for beyond-4G applications | 2013-08-21 | Paper |
| An efficient countermeasure against correlation power-analysis attacks with randomized Montgomery operations for DF-ECC processor Cryptographic Hardware and Embedded Systems – CHES 2012 | 2012-11-13 | Paper |
| New serial architecture for the Berlekamp-Massey algorithm IEEE Transactions on Communications | 2001-09-04 | Paper |
Research outcomes over time
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