A logic-topological calculus for the construction of integrated circuits. I (Q1088971)

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A logic-topological calculus for the construction of integrated circuits. I
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    A logic-topological calculus for the construction of integrated circuits. I (English)
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    1986
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    The calculus of nets that enables to handle logical and geometrical information in VLSI design is introduced. A result of the use of this calculus is a system supporting the automatic design of VLSI circuits. The techniques of circuit design based on the calculus are presented on several examples.
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    logic design
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    placement
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    routing
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    layout
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    logical-topological design
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    recursion schemes
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    calculus of nets
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    VLSI design
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    automatic design of VLSI circuits
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