Efficient algorithms for optimal 4-bit reversible logic system synthesis (Q2375481)

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Efficient algorithms for optimal 4-bit reversible logic system synthesis
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    Efficient algorithms for optimal 4-bit reversible logic system synthesis (English)
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    14 June 2013
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    Summary: Owing to the exponential nature of the memory and run-time complexity, many methods can only synthesize 3-bit reversible circuits and cannot synthesize 4-bit reversible circuits well. We mainly absorb the ideas of our 3-bit synthesis algorithms based on hash table and present the efficient algorithms which can construct almost all optimal 4-bit reversible logic circuits with many types of gates and at mini-length cost based on constructing the shortest coding and the specific topological compression; thus, the lossless compression ratio of the space of \(n\)-bit circuits reaches near \(2 \times n!\). This paper presents the first work to create all 3120218828 optimal 4-bit reversible circuits with up to 8 gates for the CNT (Controlled-NOT gate, NOT gate, and Toffoli gate) library, and it can quickly achieve 16 steps through specific cascading created circuits.
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