Efficient algorithms for optimal 4-bit reversible logic system synthesis
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Publication:2375481
DOI10.1155/2013/291410zbMATH Open1267.68115DBLPjournals/jam/LiCYL13OpenAlexW2007208334WikidataQ59002627 ScholiaQ59002627MaRDI QIDQ2375481FDOQ2375481
Authors: Zhiqiang Li, Wen-Jie Liu, Han-Wu Chen, Guowu Yang
Publication date: 14 June 2013
Published in: Journal of Applied Mathematics (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1155/2013/291410
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Cites Work
Cited In (6)
- A reversible logic synthesis algorithm based on the transformation of the truth table
- Novel parity-preserving designs of reversible 4-bit comparator
- Minimal reversible circuit synthesis on a DNA computer
- Optimal synthesis of linear reversible circuits
- Optimal 4-bit reversible mixed-polarity Toffoli circuits
- Optimized 4-bit quantum reversible arithmetic logic unit
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