A graph-theoretic via minimization algorithm for two-layer printed circuit boards (Q4742710)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 3797681
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | A graph-theoretic via minimization algorithm for two-layer printed circuit boards |
scientific article; zbMATH DE number 3797681 |
Statements
A graph-theoretic via minimization algorithm for two-layer printed circuit boards (English)
0 references
1983
0 references
polynomial time
0 references
preassignment of line segments
0 references