MODULAR FIXED-SIZE VLSI ARCHITECTURES FOR GENERAL MULTISPLITTING ITERATION
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Cites work
- scientific article; zbMATH DE number 51132 (Why is no real title available?)
- scientific article; zbMATH DE number 3628373 (Why is no real title available?)
- scientific article; zbMATH DE number 3892457 (Why is no real title available?)
- scientific article; zbMATH DE number 3366440 (Why is no real title available?)
- A family of new efficient arrays for matrix multiplication
- Convergence of parallel multisplitting iterative methods for M-matrices
- MODULAR FIXED-SIZE VLSI ARCHITECTURES FOR GENERAL MULTISPLITTING ITERATION
- Multi-Splittings of Matrices and Parallel Solution of Linear Systems
- Parallel Algorithms for Nonlinear Problems
- Parallel algorithms and architectures for multisplitting iterative methods
- Partitioned Matrix Algorithms for VLSI Arithmetic Systems
- Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays
- Solution of Partial Differential Equations on Vector and Parallel Computers
- The Design of Optimal Systolic Arrays
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