scientific article; zbMATH DE number 3628373
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Publication:4190126
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(61)- Construction of optimal algorithms for mass computations in digital filtering problems
- A mixed cellular method of matrix multiplication
- Minimizing the number of machines for minimum length schedules
- Area-period tradeoffs for multiplication of rectangular matrices
- Formal analysis of a systolic system for finite element stiffness matrices
- 1-D and 2-D algorithms for orthogonal transformations
- A systolic array for the longest common subsequence problem
- Topological transformations as a tool in the design of systolic networks
- Tight chip area lower bounds for discrete Fourier and Walsh-Hadamard transformations
- Parallel solution of symmetric positive definite systems with hyperbolic rotations
- A systolic array for the regularization of ill-conditioned least-squares problem with triangular Toeplitz matrix
- On the direct parallel solution of systems of linear equations: New algorithms and systolic structures
- Optimal parallel algorithms for constructing and maintaining a balanced m-way search tree
- Efficient systolic structures for LU decomposition and system of linear equations
- Communication-efficient parallel algorithms for distributed random-access machines
- Automatic design and partitioning of systolic/wavefront arrays for VLSI
- A VLSI partition algorithm
- Synthesis and equivalence of concurrent systems
- Fault-tolerance VLSI sorters
- On totalistic systolic networks
- Matrix-vector multiplication: Parallel algorithms and architectures
- On design of wavefront-driven algorithms for processing large-scale band- limited matrices on rotary arrays
- Area-time tradeoffs for matrix multiplication and related problems in VLSI models
- Trends in systolic and cellular computation
- Systolic convolution of arithmetic functions
- A fault-tolerant hexagonal systolic array
- Correct translation of data parallel assignment onto array processors
- Matrix-vector multiplication on a fixed-size linear systolic array
- A systolic architecture for optimal filter design support
- Reconfigurable systolic arrays with fixed size and structure degradation
- Systolic array implementation of some iterative algorithms for solving systems of linear algebraic equations
- Designing of processor-time optimal systolic arrays for band matrix-vector multiplication
- On systolic array methods for band matrix factorizations
- An orthogonal systolic array for the algebraic path problem
- Systolic and hyper-systolic algorithms for the gravitational \(N\)-body problem, with an application to Brownian motion
- Symmetrizing a Hessenberg matrix: Designs for VLSI parallel processor arrays
- A theoretical and empirical study of the trajectories of solutions on the grid of systolic genetic search
- Fast systolic parsing of context free languages
- THE MAGIC OF INTERLOCKING PROPERTY: FAST SYSTOLIC DESIGN
- Mapping full‐systolic arrays for matrix product on XILINX's XC4000(E,EX) FPGAs
- Hyperelliptic surfaces are Loewner
- scientific article; zbMATH DE number 3909766 (Why is no real title available?)
- Résolution systolique de systèmes linéaires denses
- Systolic algorithms
- Fast linear systolic matrix vector multiplication
- Nonlinear transformations of the matrix multiplication algorithm
- A new efficient pipelined-systolic matrix-vector multiplication algorithm for a tree-structured machine
- Elimination of the computational broadcast in systolic arrays: an application to the qr decomposition algorithm
- Speeding up the systolic design in bidirectional linear arrays
- Double pipelines and fast systolic designs on linear arrays
- FOLDING TRANSFORMATIONS ON SYSTOLIC AND VLSI PROCESSOR ARRAYS
- MODULAR FIXED-SIZE VLSI ARCHITECTURES FOR GENERAL MULTISPLITTING ITERATION
- A systolic processor array for the quadrant interlocking elimination method
- Optimal piecewise linear schedules for LSGP- and LPGS-decomposed array processors via quadratic programming
- Artificial Neural Networks Generated by Low Discrepancy Sequences
- An O(1) time optimal algorithm for multiplying matrices on reconfigurable mesh
- Characterizations and computational complexity of systolic trellis automata
- Iterative tree automata
- A hierarchical design methodology for full-search block matching motion estimation
- Synthesis, structure and power of systolic computations
- Yield analysis of partial defect tolerant bit-plane array
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