Memory-efficient high-speed implementation of Kyber on Cortex-M4

DOI10.1007/978-3-030-23696-0_11MaRDI QIDQ2177629zbMATH OpenOpenAlexFDO

Authors Leon Botros, Matthias J. Kannwischer, Peter Schwabe

Publication date 6 May 2020

Full work available at URL https://doi.org/10.1007/978-3-030-23696-0_11

zbMATH Keywords

ARM Cortex-M4Kyberlattice-based cryptographynumber-theoretic transform

Mathematics Subject Classification ID

Cryptography (94A60)

Recommendations

• Faster multiplication in \(\mathbb{Z}_{2^m}[x]\) on Cortex-M4 to speed up NIST PQC candidates
• SIKE round 2 speed record on ARM Cortex-M4
• High-speed key encapsulation from NTRU
• Saber: module-LWR based key exchange, CPA-secure encryption and CCA-secure KEM
• Higher-order masked Saber

Cited in

(15)

• Verifying post-quantum signatures in 8 kB of RAM
• Fast NEON-based multiplication for lattice-based NIST post-quantum cryptography finalists
• A monolithic hardware implementation of Kyber: comparing apples to apples in PQC candidates
• Saber on ESP32
• Evaluating the potential for hardware acceleration of four NTRU-based key encapsulation mechanisms using software/hardware codesign
• SIKE round 2 speed record on ARM Cortex-M4
• Kyber
• Full Post-Quantum datagram TLS handshake in the Internet of Things
• Fast first-order masked NTTRU
• Dilithium for memory constrained devices
• Fast Falcon signature generation and verification using ARMv8 NEON instructions
• Formal verification of arithmetic masking in hardware and software
• Implementing lattice-based PQC on resource-constrained processors: a case study for Kyber/Saber's polynomial multiplication on ARM Cortex-M0/M0+
• A survey of polynomial multiplications for lattice-based cryptosystems
• Curve448 on 32-bit ARM Cortex-M4

Describes a project that uses

Uses Software

• PQM4
• NTRUEncrypt
• XKCP

This page was built for publication: Memory-efficient high-speed implementation of Kyber on Cortex-M4

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q2177629)