Daniel L. Ostapko

Available identifiers

zbMath Open ostapko.daniel-lMaRDI QIDQ3050333

List of research outcomes

Publication	Date of Publication	Type
A Simple Procedure to Generate Optimum Test Patterns for Parity Logic Networks	1981-01-01	Paper
Fault Analysis and Test Generation for Programmable Logic Arrays (PLA's)	1979-01-01	Paper
Codes for Self-clocking, AC-coupled Transmission: Aspects of Synthesis and Analysis	1975-01-01	Paper
MINI: A Heuristic Approach for Logic Minimization	1974-01-01	Paper
Generating Test Examples for Heuristic Boolean Minimization	1974-01-01	Paper
On Complementation of Boolean Functions	1972-01-01	Paper
Realization of an Arbitrary Switching Function with a Two-Level Network of Threshold and Parity Elements	1970-01-01	Paper
Realization of a Class of Switching Functions by Threshold-Logic Networks	1968-01-01	Paper

Research outcomes over time

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