Jacob Savir

Available identifiers

zbMath Open savir.jacobMaRDI QIDQ3309618

List of research outcomes

Publication	Date of Publication	Type
Random pattern testability of memory control logic	2018-07-09	Paper
Reducing the MISR size	1996-01-01	Paper
Fault Propagation Through Embedded Multiport Memories	1987-01-01	Paper
Random Pattern Testability	1984-01-01	Paper
On Random Pattern Test Length	1984-01-01	Paper
A New Empirical Test for the Quality of Random Integer Generators	1983-01-01	Paper
The Weighted Syndrome Sums Approach to VLSI Testing	1981-01-01	Paper
Syndrome-Testable Design of Combinational Circuits	1980-01-01	Paper
Testing for Single Intermittent Failures in Combinational Circuits by Maximizing the Probability of Fault Detection	1980-01-01	Paper
Detection of Single Intermittent Faults in Sequential Circuits	1980-01-01	Paper
Correction to "Syndrome-Testable Design of Combinational Circuits"	1980-01-01	Paper

Research outcomes over time

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